ISSN 1674-0629
CN 44-1643/TK
CN 44-1643/TK
A Fast PLL Algorithm for Dynamic Voltage Restorer During Voltage Imbalance Sag
Jun HU , Junwei CAO , Shaojie ZHANG , Jie YANG , Zhongda YUAN , Ziheng HU , Senjing YAO , Huaying ZHANG
›› 2016, Vol. 10 ›› Issue (5) : 87 -93.
A Fast PLL Algorithm for Dynamic Voltage Restorer During Voltage Imbalance Sag
Traditional PLL algorithms cannot satisfy the requirement of dynamic voltage restorer (DVR) for speed and accuracy during three-phase voltage imbalance sag. Based on analysis of traditional PLL aglorithms, this paper proposed a novel PLL strategy which combines the dαβ-PLL algorithm with a phase prediction method using historial data. During the first cycle of the fault, the phase angle is estimated from the recorded voltage just before the fault occurred; and after the first cycle, the estimated values of dαβ-PLL are then used for phase angle eatimation. The simulation results and prototype test verfied that the proposed PLL strategy is capable to achieve fast phase-locking during three-phase voltage imbalance sag.
dynamic voltage restorer (DVR) / three-phase PLL / phase-locked loop / voltage imbalance sag / soft PLL
National Natural Science Foundation of China(61233016)
Science and Technology Projects of CSG(K-SZ2012-026)
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